ssm3k329r 2014-03-01 1 toshiba field-effect transisto r silicon n-channel mos type ssm3k329r power management switch applications high-speed switching applications ? 1.8-v drive ? low on-resistance: r ds(on) = 289 m ? (max) (@v gs = 1.8 v) : r ds(on) = 170 m ? (max) (@v gs = 2.5 v) : r ds(on) = 126 m ? (max) (@v gs = 4.0 v) absolute maximum ratings (ta = 25c) characteristic symbol rating unit drain-source voltage v dss 30 v gate-source voltage v gss 12 v dc i d (note 1) 3.5 drain current pulse i dp (note 1) 7.0 a p d (note 2) 1 power dissipation t = 10s 2 w channel temperature t ch 150 c storage temperature range t stg ?55 to 150 c note: using continuously under heavy loads (e.g. the application of high temperature/current/voltage a nd the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 1: the channel temperature should not exceed 150 c during use. note 2: mounted on a fr4 board. (25.4 mm 25.4 mm 1.6 mm, cu pad: 645 mm 2 ) handling precaution when handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. thermal resistance r th (ch-a) and power dissipation p d vary depending on board material, board area, board thickness and pad area. when using this device, please take heat dissipation into consideration unit: mm jedec D jeita D toshiba 2-3z1a weight: 11 mg (typ.) 1: gate 2: source 3: drain sot-23f start of commercial production 2010-02
ssm3k329r 2014-03-01 2 electrical characteristics (ta = 25c) characteristic symbol test conditions min typ. max unit v (br) dss i d = 1 ma, v gs = 0 v 30 ? ? drain-source breakdown voltage v (br) dsx i d = 1 ma, v gs = ?12 v 18 ? ? v drain cut-off current i dss v ds = 30 v, v gs = 0 v ? ? 1 a gate leakage current i gss v gs = 12 v, v ds = 0 v ? ? 1 a gate threshold voltage v th v ds = 3 v, i d = 1 ma 0.4 ? 1.0 v forward transfer admittance ? y fs ? v ds = 3 v, i d = 1.0 a (note 3) 2.1 4.2 ? s i d = 1.0 a, v gs = 4.0 v (note 3) ? 96 126 i d = 0.8 a, v gs = 2.5 v (note 3) ? 118 170 drain?source on-resistance r ds (on) i d = 0.5 a, v gs = 1.8 v (note 3) ? 158 289 m input capacitance c iss ? 123 ? output capacitance c oss ? 43 ? reverse transfer capacitance c rss v ds = 15v, v gs = 0 v, f = 1 mhz ? 18 ? pf total gate charge q g ? 1.5 ? gate-source charge q gs1 ? 0.3 ? gate-drain charge q gd v ds = 15v, i d = 2.0 a v gs = 4 v ? 0.6 ? nc turn-on time t on ? 9.2 ? switching time turn-off time t off v dd = 15 v, i d = 1.0 a, v gs = 0 to 2.5 v, r g = 4.7 ? 6.4 ? ns drain-source forward voltage v dsf i d = -3.5 a, v gs = 0 v (note 3) ? -0.90 -1.2 v note 3: pulse test
ssm3k329r 2014-03-01 3 switching time test circuit marking equivalent circuit (top view) usage considerations let v th be the voltage applied between gate and sour ce that causes the drain current (i d ) to below (1 ma for the ssm3k329r). then, for normal switching operation, v gs(on) must be higher than v th, and v gs(off) must be lower than v th. this relationship can be expressed as: v gs(off) < v th < v gs(on). take this into consideration when using the device. 2.5 v t on t off (b) v in (c) v out 0 v v dd v ds (on) t r t f 10% 90% 90% 10% (a) test circuit v dd = 15 v r g = 4.7 duty 1% v in : t r , t f < 5 ns common source ta = 25c 0 2.5 v in out v dd 10 s r g kkh 1 2 3 1 2 3
ssm3k329r 2014-03-01 4 ambient temperature ta (c) ambient temperature ta (c) v th ? ta gate threshold voltage v th (v) 1.0 0 ? 50 0 150 50 100 r ds (on) ? ta drain?source on-resistance r ds (on) (m ? ) 0 ? 50 0 50 150 200 100 400 drain?source on-resistance r ds (on) (m ? ) 0 gate?source voltage v gs (v) 4 0 r ds (on) ? v gs 400 200 12 ? 25 c ta = 100 c 25 c 0.5 common source v ds = 3 v i d = 1 ma common source pulse test i d = 0.5 a / v gs = 1.8 v 0.8 a / 2.5 v 300 100 300 100 8 1.0 a / 4.0 v 2 6 10 drain?source voltage v ds (v) i d ? v ds drain current i d (a) 0 6 0 0.2 0.4 0.6 4 10 v 2 4.0 v v gs = 1.8 v 7 0.8 1.0 2.5 v common source ta = 25 c pulse test 5 3 1 gate?source voltage v gs (v) i d ? v gs drain current i d (a) r ds (on) ? i d drain current i d (a) drain?source on-resistance r ds (on) (m ? ) 0 1 2 5 0 400 200 7 300 100 3 4 6 v gs = 4.0v 2.5 v common source ta = 25c pulse test 1.8 v 10 0 1 0.01 0.1 0.001 2.0 ? 25 c ta = 100 c 25 c 1.0 common source v ds = 3 v pulse test 1.5 v i d = 1.0a common source pulse test
ssm3k329r 2014-03-01 5 drain?source voltage v ds (v) c ? v ds capacitance c (pf) 1 0.1 1 10 100 10 100 30 50 3 5 common source ta = 25c f = 1 mhz v gs = 0 v drain current i d (a) switching time t (ns) t ? i d 1 0.01 100 0.1 1000 1 10 10 t f t on t r common source v dd = 15 v v gs = 0 to 2.5 v ta = 25 c r g = 4.7 t off c iss c oss c rss 500 300 1000 drain current i d (a) forward transfer admittance ? y fs ? (s) |y fs | ? i d 0.001 10 0.1 0.01 1 1 0.01 0.001 10 0.1 common source v ds = 3 v ta = 25c pulse test drain current i dr (a) drain?source voltage v ds (v) i dr ? v ds 10 0 0.1 1 0.001 0.01 ?0.5 ?1.0 ?1.5 ? 25 c ta =100 c 25 c common source v gs = 0 v pulse test g d s i dr gate?source voltage v gs (v) 0 0 2 4 8 10 6 2 v dd = 24 v 4 1 3 common source i d = 2.0 a ta = 25c v dd = 15 v total gate charge q g (nc) dynamic input characteristic
ssm3k329r 2014-03-01 6 pulse width t w (s) r th ? t w transient thermal impedance r th (c/w ) 0.001 1000 0.01 0.1 1 100 10 100 1000 1 10 single pulse a. mounted on fr4 board (25.4 mm 25.4 mm 1.6 mm, cu pad: 645 mm 2 ) b. mounted on fr4 board (25.4 mm 25.4 mm 1.6 mm, cu pad: 0.72 mm 2 3) b a ambient temperature ta (c) p d ? ta power dissipation p d (mw) 1600 0 400 120 100 140 800 160 80 60 40 20 0 -20 -40 a 1200 a: mounted on fr4 board (25.4mm 25.4mm 1.6 mm , cu pad : 645 mm 2 ) b: mounted on fr4 board (25.4mm 25.4mm 1.6 mm , cu pad : 0.72 mm 2 3) b
ssm3k329r 2014-03-01 7 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba's written permission, reproduc tion is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a ma lfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, cu stomers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and condi tions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be us ed with or for. customers are solely responsible for all aspe cts of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) eval uating and determining the applicability of any info rmation contained in this document, or in c harts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operatin g parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? 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